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'''Ravi Arimilli''' (born 1963) is an [[IBM Fellow]] and Chief Architect. Largely responsible for development of the [[POWER5]], he is one of the most [[List of prolific inventors|prolific inventors]] in the world, being awarded 78 patents in 2002 and a further 53 in 2003. He has over 507 patents to his name and is listed among the most [[List of prolific inventors|prolific inventors]] in the world as measured by U.S. utility patents.<ref> | {{Short description|Indian inventor}} | ||
'''Ravi Kumar Arimilli''' (born 1963) is an [[IBM Fellow]] and Chief Architect. Largely responsible for development of the [[POWER5]], he is one of the most [[List of prolific inventors|prolific inventors]] in the world, being awarded 78 patents in 2002 and a further 53 in 2003. He has over 507 patents to his name and is listed among the most [[List of prolific inventors|prolific inventors]] in the world as measured by U.S. utility patents.<ref>{{Cite web |url=http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&r=0&p=1&f=S&l=50&d=PTXT&Query=apt%2F1+and+in%2FArimilli-Ravi-K$ |title=USPTO Utility Patent Search for Ravi Arimilli |access-date=2017-12-20 |archive-date=2019-01-14 |archive-url=https://web.archive.org/web/20190114231606/http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=/netahtml/PTO/search-adv.htm&r=0&p=1&f=S&l=50&d=PTXT&Query=apt/1+and+in/Arimilli-Ravi-K$ |url-status=dead }}</ref> | |||
Arimilli moved with his family to the United States from [[Andhra Pradesh]], India, in 1969. He studied at [[Louisiana State University]], and joined IBM in 1985. His expertise includes [[symmetric multiprocessing]] (SMP) system structures, [[CPU cache|cache]]/memory hierarchies and [[system bus]] protocols. | Arimilli moved with his family to the United States from [[Andhra Pradesh]], India, in 1969. He studied at [[Louisiana State University]], and joined IBM in 1985. His expertise includes [[symmetric multiprocessing]] (SMP) system structures, [[CPU cache|cache]]/memory hierarchies and [[system bus]] protocols. | ||
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*[http://timesofindia.indiatimes.com/articleshow/431188.cms ''The Times of India'' article on Arimilli] | *[http://timesofindia.indiatimes.com/articleshow/431188.cms ''The Times of India'' article on Arimilli] | ||
*[http://in.rediff.com/money/2005/dec/10nri.htm A news item about Arimilli on rediff.com] | *[http://in.rediff.com/money/2005/dec/10nri.htm A news item about Arimilli on rediff.com] | ||
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{{DEFAULTSORT:Arimilli, Ravi}} | {{DEFAULTSORT:Arimilli, Ravi}} | ||
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Latest revision as of 22:37, 8 December 2025
Ravi Kumar Arimilli (born 1963) is an IBM Fellow and Chief Architect. Largely responsible for development of the POWER5, he is one of the most prolific inventors in the world, being awarded 78 patents in 2002 and a further 53 in 2003. He has over 507 patents to his name and is listed among the most prolific inventors in the world as measured by U.S. utility patents.[1]
Arimilli moved with his family to the United States from Andhra Pradesh, India, in 1969. He studied at Louisiana State University, and joined IBM in 1985. His expertise includes symmetric multiprocessing (SMP) system structures, cache/memory hierarchies and system bus protocols.
References[edit | edit source]
- ↑ "USPTO Utility Patent Search for Ravi Arimilli". Archived from the original on 2019-01-14. Retrieved 2017-12-20.
External links[edit | edit source]
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